This article includes a list of references, related reading, or external links, but its sources remain unclear because it lacks inline citations. Please help improve this article by introducing more precise citations.(March 2013) (Learn how and when to remove this message)
In computing, bus mastering is a feature supported by many bus architectures that enables a device connected to the bus to initiate direct memory access (DMA) transactions. It is also referred to as first-party DMA, in contrast with third-party DMA where a system DMA controller actually does the transfer.
Some types of buses allow only one device (typically the CPU, or its proxy) to initiate transactions. Most modern bus architectures, such as PCI, allow multiple devices to bus master because it significantly improves performance for general-purpose operating systems. Some real-time operating systems prohibit peripherals from becoming bus masters, because the scheduler can no longer arbitrate for the bus and hence cannot provide deterministic latency.
While bus mastering theoretically allows one peripheral device to directly communicate with another, in practice almost all peripherals master the bus exclusively to perform DMA to main memory.
If multiple devices are able to master the bus, there needs to be a bus arbitration scheme to prevent multiple devices attempting to drive the bus simultaneously. A number of different schemes are used for this; for example SCSI has a fixed priority for each SCSI ID. PCI does not specify the algorithm to use, leaving it up to the implementation to set priorities.
In computing, busmastering is a feature supported by many bus architectures that enables a device connected to the bus to initiate direct memory access...
final mix to a data storage device, the master Stem mastering, contains the same process as ordinary mastering but the individual audio tracks are grouped...
processor bus but in a standardized format that is independent of any given processor's native bus. Devices connected to the PCI bus appear to a busmaster to...
allowed to initiate busmaster versions of all of the memory cycles. Busmaster I/O cycles, which were introduced by the LPC bus specification, and ISA-style...
Rubini, Greg Kroah-Hartman DMA and Interrupt Handling DMA Modes & BusMasteringMastering the DMA and IOMMU APIs, Embedded Linux Conference 2014, San Jose...
nodes to share the bus, they use a medium access control technology such as carrier-sense multiple access (CSMA) or a busmaster. "Network Topologies"...
address bus. Address bus Data busBusmastering Ian Sinclair; John Dunton. "Practical Electronics Handbook". 2013. section "The control bus". p. 209-210. Definition...
by the host follows. This is different from 16-bit ISA busmastering because LPC busmastering requires a 32-bit memory address when performing a memory...
motherboard buses of the Intel 80286 CPU (and expanded interrupt and DMA facilities) used in the IBM AT, with improved support for busmastering. The ISA bus was...
is extended to 32 bits and allows more than one CPU to share the bus. The busmastering support is also enhanced to provide access to 4 GB of memory. Unlike...
Channel bus were available to RS/6000 platform only, and were not initially supported on cards operating on an Intel platform. With busmastering, each...
onward. CardBus is effectively a 32-bit, 33 MHz PCI bus in the PC Card design. CardBus supports busmastering, which allows a controller on the bus to talk...
expansion bus used by the Amiga 2000 computer. The bus is mainly a buffered extension of the Motorola 68000 bus, with support for busmastering DMA. The...
bidirectional bus, often implemented as a three-state bus. To prevent bus contention on the address bus, a bus arbiter selects which particular busmaster is allowed...
referred to as the New Bus for London and colloquially as the Borismaster or Boris Bus, is a low-floor diesel double-decker bus operated in London, England...
Multibus is a computer bus standard used in industrial systems. It was developed by Intel Corporation and was adopted as the IEEE 796 bus. The Multibus specification...
MultiMaster technology with a trio of bus-mastering Fast SCSI host adapters for ISA, VLB, and EISA. MultiMaster was BusLogic's name for their latest ASIC...
Sound cards PC chipsets Local buses of various sorts—in particular, for busmastering on modern systems Low-bandwidth I/O buses of various sorts (for pointing...
In audio engineering, a bus (alternate spelling buss, plural busses) is a signal path that can be used to combine (sum) individual audio signal paths...
The Arm Advanced Microcontroller Bus Architecture (AMBA) is an open-standard, on-chip interconnect specification for the connection and management of...
CardBus designs. The major benefit of the ExpressCard over the PC card is more bandwidth, due to the ExpressCard's direct connection to the system bus over...
transferred in real time without any buffering, removing the need for busmastering or arbitration. The ZV port was invented as an alternative to such methods...
These codes can be found in freely available software (for example, BusMaster) as well as in the ISO itself. On-board diagnostics, general article about...
VMEbus (Versa Module Eurocard bus) is a computer bus standard physically based on Eurocard sizes. In 1979, during development of the Motorola 68000 CPU...
Global Information