Global InformationSpiNNaker information
 The SpiNNaker 1 million core machine assembled at the University of Manchester | |
| Developer | Steve Furber |
|---|---|
| Product family | Manchester computers |
| Type | Neuromorphic |
| Release date | 2019 |
| CPU | ARM968E-S @ 200 MHz |
| Memory | 7 TB |
| Successor | SpiNNaker 2[1] |
| Website | apt |
SpiNNaker (spiking neural network architecture) is a massively parallel, manycore supercomputer architecture designed by the Advanced Processor Technologies Research Group (APT) at the Department of Computer Science, University of Manchester.[2] It is composed of 57,600 processing nodes, each with 18 ARM9 processors (specifically ARM968) and 128 MB of mobile DDR SDRAM, totalling 1,036,800 cores and over 7 TB of RAM.[3] The computing platform is based on spiking neural networks, useful in simulating the human brain (see Human Brain Project).[4][5][6][7][8][9][10][11][12]
The completed design is housed in 10 19-inch racks, with each rack holding over 100,000 cores.[13] The cards holding the chips are held in 5 blade enclosures, and each core emulates 1,000 neurons.[13] In total, the goal is to simulate the behaviour of aggregates of up to a billion neurons in real time.[14] This machine requires about 100 kW from a 240 V supply and an air-conditioned environment.[15]
SpiNNaker is being used as one component of the neuromorphic computing platform for the Human Brain Project.[16][17]
On 14 October 2018 the HBP announced that the million core milestone had been achieved.[18][19]
On 24 September 2019 HBP announced that an 8 million euro grant, that will fund construction of the second generation machine, (called SpiNNcloud) has been given to TU Dresden.[20]
- ^ Yan, Yexin; Kappel, David; Neumarker, Felix; Partzsch, Johannes; Vogginger, Bernhard; Hoppner, Sebastian; Furber, Steve; Maass, Wolfgang; Legenstein, Robert; Mayr, Christian (2019). "Efficient Reward-Based Structural Plasticity on a SpiNNaker 2 Prototype". IEEE Transactions on Biomedical Circuits and Systems. 13 (3): 579–591. arXiv:1903.08500. Bibcode:2019arXiv190308500Y. doi:10.1109/TBCAS.2019.2906401. ISSN 1932-4545. PMID 30932847. S2CID 84186422.
- ^ Advanced Processor Technologies Research Group
- ^ "SpiNNaker Project - The SpiNNaker Chip". apt.cs.manchester.ac.uk. Retrieved 17 November 2018.
- ^ SpiNNaker Home Page, University of Manchester, retrieved 11 June 2012
- ^ Furber, S. B.; Galluppi, F.; Temple, S.; Plana, L. A. (2014). "The SpiNNaker Project". Proceedings of the IEEE. 102 (5): 652–665. doi:10.1109/JPROC.2014.2304638.
- ^ Xin Jin; Furber, S. B.; Woods, J. V. (2008). "Efficient modelling of spiking neural networks on a scalable chip multiprocessor". 2008 IEEE International Joint Conference on Neural Networks (IEEE World Congress on Computational Intelligence). pp. 2812–2819. doi:10.1109/IJCNN.2008.4634194. ISBN 978-1-4244-1820-6. S2CID 2103654.
- ^ A million ARM cores to host brain simulator Archived 17 July 2011 at the Wayback Machine News article on the project in the EE Times
- ^ Temple, S.; Furber, S. (2007). "Neural systems engineering". Journal of the Royal Society Interface. 4 (13): 193–206. doi:10.1098/rsif.2006.0177. PMC 2359843. PMID 17251143. A manifesto for the SpiNNaker project, surveying and reviewing the general level of understanding of brain function and approaches to building computer modelof the brain.
- ^ Plana, L. A.; Furber, S. B.; Temple, S.; Khan, M.; Shi, Y.; Wu, J.; Yang, S. (2007). "A GALS Infrastructure for a Massively Parallel Multiprocessor". IEEE Design & Test of Computers. 24 (5): 454. doi:10.1109/MDT.2007.149. S2CID 16758888. A description of the Globally Asynchronous, Locally Synchronous (GALS) nature of SpiNNaker, with an overview of the asynchronous communications hardware designed to transmit neural 'spikes' between processors.
- ^ Navaridas, J.; Luján, M.; Miguel-Alonso, J.; Plana, L. A.; Furber, S. (2009). "Understanding the interconnection network of SpiNNaker". Proceedings of the 23rd international conference on Conference on Supercomputing - ICS '09. p. 286. CiteSeerX 10.1.1.634.9481. doi:10.1145/1542275.1542317. ISBN 9781605584980. S2CID 3710084. Modelling and analysis of the SpiNNaker interconnect in a million-core machine, showing the suitability of the packet-switched network for large-scale spiking neural network simulation.
- ^ Rast, A.; Galluppi, F.; Davies, S.; Plana, L.; Patterson, C.; Sharp, T.; Lester, D.; Furber, S. (2011). "Concurrent heterogeneous neural model simulation on real-time neuromimetic hardware". Neural Networks. 24 (9): 961–978. doi:10.1016/j.neunet.2011.06.014. PMID 21778034. A demonstration of SpiNNaker's ability to simulate different neural models (simultaneously, if necessary) in contrast to other neuromorphic hardware.
- ^ Sharp, T.; Galluppi, F.; Rast, A.; Furber, S. (2012). "Power-efficient simulation of detailed cortical microcircuits on SpiNNaker". Journal of Neuroscience Methods. 210 (1): 110–118. doi:10.1016/j.jneumeth.2012.03.001. PMID 22465805. S2CID 19083072. Four-chip, real-time simulation of a four-million-synapse cortical circuit, showing the extreme energy efficiency of the SpiNNaker architecture
- ^ a b Video interview by computerphile with Steve Furber
- ^ "SpiNNaker Project - Architectural Overview". apt.cs.manchester.ac.uk. Retrieved 17 November 2018.
- ^ "SpiNNaker Project - Boards and Machines". apt.cs.manchester.ac.uk. Retrieved 17 November 2018.
- ^ Calimera, A; Macii, E; Poncino, M (2013). "The Human Brain Project and neuromorphic computing". Functional Neurology. 28 (3): 191–6. PMC 3812737. PMID 24139655.
- ^ Monroe, D. (2014). "Neuromorphic computing gets ready for the (really) big time". Communications of the ACM. 57 (6): 13–15. doi:10.1145/2601069. S2CID 20051102.
- ^ "SpiNNaker brain simulation project hits one million cores on a single machine". Retrieved 19 October 2018.
- ^ Petrut Bogdan (14 October 2018), SpiNNaker: 1 million core neuromorphic platform, retrieved 19 October 2018
- ^ "Second Generation SpiNNaker Neuromorphic Supercomputer to be Built at TU Dresden - News". www.humanbrainproject.eu. Retrieved 2 October 2019.