The Clipper architecture is a 32-bit RISC-like instruction set architecture designed by Fairchild Semiconductor. The architecture never enjoyed much market success, and the only computer manufacturers to create major product lines using Clipper processors were Intergraph and High Level Hardware, although Opus Systems offered a product based on the Clipper as part of its Personal Mainframe range.[1] The first processors using the Clipper architecture were designed and sold by Fairchild, but the division responsible for them was subsequently sold to Intergraph in 1987; Intergraph continued work on Clipper processors for use in its own systems.[2]
The Clipper architecture used a simplified instruction set compared to earlier CISC architectures, but it did incorporate some more complicated instructions than were present in other contemporary RISC processors. These instructions were implemented in a so-called Macro Instruction ROM within the Clipper CPU. This scheme allowed the Clipper to have somewhat higher code density than other RISC CPUs.
^"Opus Systems Unveils Series 300 Unix Workstations". Computerworld. 4 March 1987. p. 41. Retrieved 23 June 2022.
^Weisberg, David (2008). "The Engineering Design Revolution: The People, Companies and Computer Systems That Changed Forever the Practice of Engineering" (PDF). Chapter 14. Archived (PDF) from the original on 4 March 2016. Retrieved 26 June 2016.
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