Global InformationCSG 65CE02 information
| General information | |
|---|---|
| Launched | 1988 |
| Discontinued | 1988 |
| Common manufacturer(s) |
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| Performance | |
| Max. CPU clock rate | 2 MHz to 10 MHz |
| Architecture and classification | |
| Instruction set | 6502 |
| Physical specifications | |
| Package(s) |
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The CSG 65CE02 is an 8/16-bit microprocessor developed by Commodore Semiconductor Group in 1988.[1] It is a member of the MOS Technology 6502 family, developed from the CMOS WDC 65C02 released by the Western Design Center in 1983.
Like the 65C02, the 65CE02 was built on a 2 µm CMOS process instead of the original 6502's 8 µm NMOS technology, making the chip smaller (and thus less expensive) as well as using much less power. In addition to changes made in the 65C02, the 65CE02 also included improvements to the processor pipeline to allow one-byte instructions to complete in 1 cycle, rather than the 6502's (and most variants) minimum of 2 cycles. It also removed 1 cycle delays when crossing page boundaries. These changes improved performance as much as 25% at the same clock speed.
Other changes included the addition of a third index register, Z, along with the addition and modification of a number of instructions to use this register. The zero-page, the first 256 bytes of memory that were used as pseudo-registers, could now be moved to any page in main memory using the B(ase page) register. The stack register was widened from 8 to 16-bits using a similar page register, SPH (stack pointer high), allowing the stack to be moved out of page one and to grow to larger sizes.
The 65CE02 was the basis for the system on a chip CSG 4510 that was developed for the unreleased Commodore 65. The 65CE02 was later used for the A2232 serial port card for the Amiga computer. It appears to have seen no other use.
- ^ "MOS 65CE02 Microprocessor Data Sheet" (PDF).