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C Level Design information


C Level Design
Company typePrivate
IndustryElectronic design automation
PredecessorCompiLogic
Founded1996; 28 years ago (1996)
FounderDon Soderman
Denis Coleman
Yuri Panchul
DefunctNovember 12, 2001 (2001-11-12)
FateAcquired
SuccessorSynopsys
Headquarters
San Jose, California
,
U.S.
ProductsC2Verilog
CycleC
Number of employees
30 (2001)
Websitewww.synopsys.com

C Level Design was a computer software company based in San Jose, California. It developed a tools to translate from the C programming language to hardware description languages.

The company was established in 1996 by Don Soderman, Denis Coleman and Yuri Panchul.[1] The first product was called C2Verilog.[2] Originally called CompiLogic Corporation, its name was changed in December 1998.[3]

Networking and telecom companies including Nortel, Alcatel, Sony, Boeing, Compaq and Fujitsu used C Level's System Compiler design environment. Using a C2Verilog tool, Hitachi developed a rough concept of five-stage, 8-bit microcontroller in about three weeks.[4] C2Verilog was used by the NASA Jet Propulsion Lab in Pasadena, California.[5]

At its height, C Level employed 30 people. The company had about $3 million in accumulated revenue over several years.[6]

In June 2000, Altera announced an investment in the company.[7] In March 2001, the company announced it would donate its CycleC technology to the Open SystemC Initiative.[8] However, the transfer never took place; in November 2001, the company ceased operation. Synopsys acquired its assets and integrated CycleC simulation methodology into Synopsys' VCS Verilog simulator, and discontinued other C Level products.[6] C Level's synthesis technology included at least one patent.[9][10]

  1. ^ Richard Goering (January 26, 1998). "Startup offers alternative to behavioral synthesis at DesignCon". EE Times.
  2. ^ "Breakthrough EDA Product From Compilogic Accelerates System-To-Hardware Design". News release. CompiLogic. January 27, 1998. Retrieved June 26, 2011.
  3. ^ Richard Goering (December 14, 1998). "C Level Design tackles C-to-HDL". EE Times. Retrieved June 26, 2011.
  4. ^ Ann Steffora (December 14, 1998). "C Level Design to ease move to system level use". Electronic News. Retrieved June 28, 2011.
  5. ^ "CompiLogic Introduces New Product for Accelerating Data-Flow and DSP IC Design; New ANSI C to RTL Verilog Compiler Enhances User Control of Hardware Operations". news release. Business Wire. June 9, 1998. Retrieved June 26, 2011.
  6. ^ a b Richard Goering (November 12, 2001). "C Level folds, Synopsys buys its assets". EE Times. Retrieved June 26, 2011.
  7. ^ Crista Souza (June 6, 2000). "Altera takes stake in C Level Design to streamline IC-design automation". EE Times. Retrieved June 26, 2011.
  8. ^ "C Level Design Donates CycleC Methodology to the Open SystemC Initiative and Accellera; Company Demonstrates Openness and Commitment to Industry Standardization Efforts for C/C++". News release. Business Wire. March 19, 2001. Retrieved June 26, 2011.
  9. ^ Yuri V. Panchul; Donald A. Soderman; Denis R. Coleman. "System for converting hardware designs in high-level programming language to hardware implementations". Retrieved June 28, 2011. United States Patent 6226776, Filed September 16, 1997, issued May 1, 2001.
  10. ^ Yuri V. Panchul; Donald A. Soderman; Denis R. Coleman. "System for converting hardware designs in high-level programming languages to hardware implementations". Retrieved June 26, 2011. United States Patent 6848085, Filed April 30, 2001, issued January 25, 2005.

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