The Alpha 21264 is a Digital Equipment Corporation RISC microprocessor launched on 19 October 1998. The 21264 implemented the Alpha instruction set architecture (ISA).
The Alpha21264 is a Digital Equipment Corporation RISC microprocessor launched on 19 October 1998. The 21264 implemented the Alpha instruction set architecture...
company, the 21164-based AlphaPC 164 and AlphaPC 164LX, the 21164PC-based AlphaPC 164SX and AlphaPC 164RX and the 21264-based AlphaPC 264DP. Several third...
at the 11th Annual Microprocessor Forum, where it was described as an Alpha21264 with a 1.5 MB 6-way set-associative on-die secondary cache, an integrated...
Digital's flagship microprocessor. It was succeeded by the Alpha21264 in 1998. First silicon of the Alpha 21164 was produced in February 1994, and the OpenVMS...
originally developed by Digital Equipment Corporation (DEC) for its Alpha21264 microprocessor. Slot A is mechanically compatible but electrically incompatible...
more] nondeterministic. Some superscalar processors (MIPS R8000, Alpha21264, and Alpha 21464 (EV8)) fetch each line of instructions with a pointer to the...
200 MHz front-side bus on Duron, XP and Sempron processors, based on the Alpha21264 EV6 bus. Initially launched with 100 MHz FSB support in the earliest...
"LGA 4189 Socket and Hardware" (PDF). Hachman, Mark (February 2, 1999). "Alpha camp moves to "Slot B" connector to push further into workstations". EE...
processors (EPYC, EPYC Embedded, Ryzen and Ryzen Threadripper), and the DEC Alpha21264. As of 2006[update], EDC/ECC and ECC/ECC are the two most-common cache...
implements this ISA, the Alpha21264, has 80 integer and 72 floating-point physical registers. There are, on an Alpha21264 chip, 80 physically separate...
entries only if they match the current process ID. For example, in the Alpha21264, each TLB entry is tagged with an address space number (ASN), and only...
requirement of memory barriers for readers and writers. On Alpha hardware (like multiprocessor Alpha21264 systems) cache line invalidations sent to other processors...
at 200 MHz. It competed with the Digital Equipment Corporation (DEC) Alpha21264 and the Hewlett-Packard (HP) PA-8500. The POWER3 was based on the PowerPC...
design, again like previous post-5x86 AMD CPUs. The Athlon utilizes the Alpha21264's EV6 bus architecture with double data rate (DDR) technology.[citation...
kinds of predictors (e.g., the store-to-load bypass predictor in the DEC Alpha21264), and various specialized predictors are likely to flourish in future...
microprocessor (that is, excluding the cache). For example, the last DEC Alpha chip uses 90% of its transistors for cache. A graphics processing unit (GPU)...
forces multiple copies of a register file, one for each datapath. The Alpha21264 (EV6), for instance, was the first large micro-architecture to implement...
1999, and it would have competed with Digital Equipment Corporation's Alpha21264 and Intel's Itanium (Merced). This was not to be the case as it was delayed...