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Holdover in synchronization applications information


Two independent clocks, once synchronized, will walk away from one another without limit.[1] To have them display the same time it would be necessary to re-synchronize them at regular intervals. The period between synchronizations is referred to as holdover and performance under holdover relies on the quality of the reference oscillator, the PLL design, and the correction mechanisms employed.[2]

  1. ^ "Smart Clock: A New Time" (PDF). IEEE. 6 December 1992. Retrieved 21 October 2012. {{cite journal}}: Cite journal requires |journal= (help)
  2. ^ "AN-1002 (Rev. 0)" (PDF). Retrieved 28 September 2012.

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